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Microchip Technology /ATSAME51J19A /DAC /CTRLB

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Interpret as CTRLB

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7 43 0 0 00 0 0 0 0 0 0 0 0 (DIFF)DIFF 0 (VREFPU)REFSEL

REFSEL=VREFPU

Description

Control B

Fields

DIFF

Differential mode enable
REFSEL

Reference Selection for DAC0/1

0 (VREFPU): External reference unbuffered

1 (VDDANA): Analog supply

2 (VREFPB): External reference buffered

3 (INTREF): Internal bandgap reference

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data